Design ended up having only 10 LVDS signals broken out as that required less unique parts. The connectors are expensive (1-282834-0) running ~$5.70 in singles. I will be looking into alternatives to see if I can get the cost down. I found some on AliExpress but I will need to order them and test them to see if they are any good.
I also included a 4 position auxiliary power connector to power up external circuits. No power safety though (fuses/TVS) so use at your own risk!
Started work on a expansion board for the DE0 FPGA development board. Planning on having 4 8-bit bi-directional level shifters giving 32 I/O and breaking out 12 LVDS signals to screw terminals. Basically a simple digital acquisition add on. Using the expansion template I made for the DE0 a couple days ago.
LVDS will be buffered to protect the FPGA. Have not picked the buffer chip yet. The bi-directional level shifter is the SN74LVC8T245PWR by Ti. Handles 1.65V to 5.5V on both sides and has basic ESD protection. I am debating putting over voltage protection on the I/O of the level shifters. A 50ohm resistor in series with the I/O plus a 5.6V TVS Diode should do the trick and not add to much cost to the board.
Working on a video driver for the Altera DE0 Development Board by terasIC. The DE0 has a 12bit (4bit per color) resistor ladder DAC that connects to the VGA connector. It is capable of 1280×1024 @ 60Hz officially but I think more is possible.