The front is pretty much done. Once the back is done I will come back and add some bevels and like to make it easier on the 3D printer.
NES2 Portable Case In Works
So I decided to have the NES2 portable case be 3D printed by my friend Chris. Currently the front panel is almost done.
Box o’ parts
Best box of parts to ever grace my work bench.
Tweaking the 128×32 LEDDMD Verilog
There was a few problems with the code for the 128×32 LEDDMD. Every so often there was flickering at random spots on the screen. This was because of the way the display memory was updated. I already fixed it by putting a dummy state at the end of the display memory update. Doing so actually increased the speed that data could be sent to the FPGA. There is no waiting between the Latch pulls.
The last problem is that there is some slight ghosting on the screen. Due to the way the screen updates it looks like the Column data is updating slightly before the rows are updated. Because of this you get a ghost effect on the opposite side of the screen that is up one row.
I think the reason why is because there is a slight delay in the rows caused by the decoders. The current plan of attack is to buffer the Column data a couple cycles before outputting.
LEDDMD 128×32 Complete
So I finally finished the prototype of the 128 x 32 Light Emitting Diode Dot Matrix Display V1.0 (LEDDMD). The protocol to write to the display is almost exactly like a shift register. There is a clock, latch, and data lines. It works in either 1 bit mode or 8 bit mode data line modes.
In 1 bit mode there is only 1 data line and in 8 bit mode this is 8 data lines. 8 bit mode enables you to clock in an entire byte of data at a time speeding up the transfer process by a factor of 8. In either mode you can do animations smoothly. All processing of the data is done on the microcontroller. The Display stores the data and takes care of running the display.
The bulk of the hardware is in the FPGA. I am using a Cyclone II EP2C8Q208C8N FPGA breakout board. There are some darlington transistor arrays that sink the current from a single row. To expand the I/O of the FPGA some decoders are used.
https://www.youtube.com/watch?v=Z3sqAGE7EaA
Here are the links to all the code:
FPGA:
Main Routine
Memory
Propeller:
Transmission Protocol and Test
LM3S1968: 74HCT595 Shift Registers
For one of my up coming Labs for EE445L I am going to need to expand the I/O of the LM3S1968. I am using the 74HCT595 much like on my pinball machine. One 74HCT595 allows you to turn 3 output pins into 8 output pins. They can be daisy chained so you can have any multiple of 8 output pins for those 3 original output pins.
In this demo I have 3 74HCT595 chips wired up. Instead of using the SSIO ports on the LM3S1968 I bit banged the port. SSIO is built in hardware that does serial communication. I decided to not use is for the 74HCT595’s because I am going to use it in controlling a DAC.
http://www.youtube.com/watch?v=_bkljz3YN60
The code is fairly module and easy to change to different ports and pins.
Link to the code.
Thermistors…Linear? How to make them so.
In my last video I showed off Lab 7 for EE445L which was the digital thermometer. To measure the temperature I used a thermistor which is a resistor that changes resistance based on the temperature.
These are non linear devices which make it a pain to get accurate readings directly.
More information on Thermistors: http://en.wikipedia.org/wiki/Thermistor
EE445L : Lab 7 Temperature Data Acquisition System
I am taking a class called EE445L which is microcontroller applications. It is a mainly lab based class where we design and prototype a new embedded system every week. We are using the Texas Instruments LM3S1968 Evaluation Board. The microcontroller is a ARM Cortex M3. It has an on board OLED display and a USB debugger. It is a fairly impressive piece of kit.
This is Lab 7 which is a Digital Thermometer. I can not post the code or schematics due to this being a Lab and it would be looked upon as academic dishonesty.
Lab 7 Problem Statement.
The Thermistor is a non linear device. That is as temperature increases linearly the resistance across does not scale linearly. Part of the circuit involves a resistor “bridge” this is a non linear setup. If you combine two non linear systems you can roughly get a linear system. It is not perfect but it is close enough.
After the bridge part the voltage level goes into an amplifier which boosts the signal to a level that the LM3S1968 can read via its ADC (Analog to Digital Convertor) ports. This signal is the passed through a Low Pass filter. The filter is set to cut off at 10Hz. The LM3S1968 is configured to sample at 100Hz. The signal is low passed to prevent aliasing from high frequencies which would cause interesting glitches on the ADC.
http://www.youtube.com/watch?v=prSfExM7wfY
I will be recording all the major EE445L labs in the next coming days.
MSP-430: IEEE CS Competition – Knock Knock Security System
Matt and I won a TI sponsored Launchpad programming contest that was held by the IEEE CS here at The University of Texas at Austin.
Here is the link for the details. In case the IEEE site goes down here is a screen cap of the page.
The idea was to create a simple secret knock security system that could record a knock “pattern” and then only unlock a door when the pattern was repeated. Only three hours where given for the competition and we where the only ones to finish everything in that time slot. They extended the contest another hour to permit more teams to finish. More details about the contest can be had by downloading the packet they gave us.
http://www.youtube.com/watch?v=WrIKSftj4l4
Code
The code is a bit rough around the edges and the bulk of the program happens in the timer interrupt (which is a no no) but for only 3 hours to solve, design, program, and debug a solution; sloppy code is a bit expected.
Points where awarded based on a few areas.
Points:
Your solution will be graded and scored on the following categorizes
1) Time it took for your team to create the solution and produce a working
prototype to the Company.
a. Every 1 min is -1 pts
b. Ex: if you finish in 1:30 in you will get -90 points
2) Working prototype: after you submit your prototype to the company,
Quality Control will take it into their lab and run test on your system. Their
test will not exceed the specified requirements and each test you pass you
will get +10 points to your score. (MAX 80pts)
3) Documentation: As in any real project you should keep a good record on
how you came up with your idea for your solution. This is to keep the
company safe from legal problems, have a record of our intellectual
property.
a. Submit your code
b. Submit any notes
c. Document any resources for the internet
d. Instruction Manual
Our legal team at the company will take a look over and award points
(MAX 10pts)
4) Creativeness of the solution: When you submit your solution to the
company, your manager will take a peek at your solution. If you solved it in
a new and ‘creative’ way, this many include additional functionality, more
efficient algorithms, or intuitive (easy to use) interface. (MAX 30pts)
5) Cost: The Company does have a parts store. You will be able to buy extra
parts such as button kits and if you burn out your chip you can buy a new
one.
Help:
If you get stuck we do have an internal consulting group which will help you but
for a cost of 2pts per 1 min. This is not for questions about the contest or
questions about the problem; this is for help solving the problem.
We scored 65 points where the nearest team behind us only scored 22 points. We dominated the competition. The judges loved the simple interface and the admin password setup. The code was fairly changeable so you can adjust the precision of the knock (humans are not robots) and how long the passwords are. Teams that did finish had no where near the feature set our solution had.
First set done!
First 8 PDS V1.1 are built!