Halfway done with the rat lining for the PCB. A rat line is basically a visible line while PCB drawing that indicates net lists. A net list is just a list of all the pins and connections that are connected together. After I rat line I can lay down the traces.

The FPGA sees the display as a 64×64. This is due to I/O limitations. The odd rows are on the left and the even rows are on the right. So row 1 and 2 really make up the physical row 1.